Tiny Tapeout IEEE paper

I’m very happy to announce that my paper about Tiny Tapeout has just been published by the IEEE solid state circuits magazine!

Tiny Tapeout aims to make it easier and cheaper than ever to design and manufacture custom Application-Specific Integrated Circuits (ASICs). I originally conceived of the idea in September 2022 as a way to guarantee silicon for my course participants.

If you’re an IEEE member, you can read it here: https://ieeexplore.ieee.org/document/10584359, otherwise you can read the preprint: https://www.techrxiv.org/users/799365/articles/1165896-tiny-tapeout-a-shared-silicon-tapeout-platform-accessible-to-everyone

The paper explores how Tiny Tapeout leverages open-source tools and resources to break down traditional barriers in the semiconductor industry. Prior to Tiny Tapeout, the primary avenue for open-source ASIC fabrication was through Google and Efabless’s chipIgnite program. However, the cost of a full chipIgnite slot, approximately $10,000, presented a significant obstacle for many hobbyists, students, and educators. Tiny Tapeout addresses this challenge by offering a more accessible entry point, providing a platform for a diverse range of participants to design, fabricate, and receive physical chips at a fraction of the cost.

Key highlights of the paper include

  • Submission flow: The paper outlines the streamlined submission process, from design creation using tools like Verilog or Wokwi to automated testing and GDSII file generation.
  • Evolution of the multiplexer design: The paper details the iterative improvements made to the multiplexer, addressing issues such as accidental macro block removal, ensuring the integrity and functionality of the shared chip.
  • Diverse project examples: From simple logic gates to a Linux-capable RISC-V CPU, the paper showcases the wide variety of projects successfully completed through Tiny Tapeout, underscoring its versatility and educational value.

The paper concludes by highlighting Tiny Tapeout’s impact on democratising ASIC design. By providing a more accessible entry point, the project fosters innovation and learning within the open-source hardware community, paving the way for a new generation of ASIC designers and enthusiasts.