A Multi Project Wafer is used to reduce the cost of making an ASIC.
By using a lot of different designs on the same wafer the Non Recurring Engineering (NRE) costs of making the mask set are shared
between all the participants.
The Google shuttle is an example of an MPW.
Our MPW submissions
So far we have made 4 tapeouts to the Google MPWs:
MPW physical implementation
We sent John McMaster some chips to take a look at from MPW1. Here presented his findings at OpenTapeOut
And you can browse his microphotographed die here
I think that starting from zero you will learn enough Verilog to write something that synthesizes and runs and then they you can harden into a design and that would be a pretty rad intro to to Verilog.