Once a chip design is complete, it is taped out for manufacturing. This means sending the GDS2 files to the foundry.

The term “tape out” was coined in 70’s. There are 2 theories from where the name comes from:

1. Early ICs were made in a very similar process to PCBs, where sticky tape was used to create the shapes, followed by shrinking the design down with an optical photograpy process.
2. ASIC design files were stored on magnetic tape. The event of carrying out the tape to the foundry was thus called “tape out”.

I now have pretty good evidence that #1 is the correct answer, as I’ve spoken to people who were designing chips in the early days of VLSI and they used paper tape before magnetic tape.

I think the reason #2 got popular was because it was described this way in an influential (and highly recommended book): CMOS/VLSI design by Weste & Harris.

Our tapeouts

So far we have made 4 tapeouts:

• MPW1
• MPW2
• MPW3
• MPW4

Course feedback

It was a great fun way to introduce people to Verilog and basic digital design in general. You don't have to have done tons of FPGA stuff or be an expert at Verilog at all. If you’re interested in hardware in general I'd say it's accessible.

Matthew Beech (digital course)