Teodor-Dumitru Ene has been doing some interesting work on optimising hardware adders.
Until I spoke with him, I didn’t realise how important this basic digital building block really is.
An interesting statistic from his presentation slides:
When a RISC-V processor boots into Linux, 65% to 72% of instructions use addition.
By default, Yosys will synthesise something like this:
reg [31:0] a;
reg [31:0] b;
wire sum = a + b;
Using a ‘middle of the road’ adder, that gives medium PPA (power, performance, area) results.
Teo has made a Python library and Yosys plugin that allows us to choose between 4 other types of adder:
These different adders all have different PPA results, and we can choose the one we want for a specific application.
We did a livestream presenting his work, but we also made this more consise edited version.
Teo did his PPA measurements using Proppy’s Jupyter notebooks, which meant he didn’t
need to download the PDK or OpenLane tools.
We thought it would be a good experiment to take the adders and put them onto the MPW6 shuttle, with a means to measure how fast they are.
You can read more about that here.
Teo’s main repository - https://github.com/tdene/synth_opt_adders
Keep up to date with Teo’s work on Twitter.