The Google/Skywater Shuttle has about 10 square mm of space for your project. This sounds tiny but is actually HUGE for many beginner projects.
Read this post to find out what you could fit in the user space.
For the Zero to ASIC course, I want to aggregate all your designs together into that area, so we need to do some extra bits:
- Multiplex all the inputs and outputs of your project to the GPIO pins of the Caravel harness.
- Connect important signals like clocks and make sure the tools know they are special
- there will need to be a bit of firmware on the SoC that sets up the GPIOs for each design and sets it active.
I was even able to harden the Verilog into the GDS2 files of 2 of my
previously laid out modules.
I did this by following this example pattern.
We have 2 other people contributing designs for 5 in total. I’ll be documenting this in the github repo
here multi project harness.