A Hardware Description Language is used to… describe hardware!
So instead of drawing out an inverter using a tool like Magic we can write a line like this:
output = !input;
Which describes what an inverter does. The ! means invert.
Common HDLs are Verilog and VHDL. There are also higher level languages like nMigen, Migen, chisel, spinal. These are often implemented
as a library to a programming language like Python. Then you can express more complex hardware in fewer lines.
Verilog is the most common HDL and the one most well supported by the Open Source tools. It’s well known for the number of ‘foot guns’ it has!
Be careful, describing hardware with an HDL is nothing like programming a CPU with a sequential language like C or Python.
Circuits operate all at once, parallelism is easy. If you want sequences of things you have to build a sequencer first (like a state machine).
A CPU executes one instruction at a time and if you want parallelism you either ‘fake’ it by interleaving programs or you have multiple cores on your CPU.
A good short course (targetted at FPGAs) introducing Verilog is WTFPGA
After writing your design in an HDL, you have to synthesise into a netlist so it can be recreated in the
actual building blocks you have in the PDK
The Zero to ASIC course was great! Through this course I became more proficient with Verilog and started to not just appreciate, but actually enjoy the design verification! It offers the glimpse at the superpower too - seeing the traces of the original design in what used to be just squiggly lines of the masks before. Plus, I am getting my own piece of a silicon 🙂